Remote Signal & Power Integrity Tech Lead - ASIC Packaging
Cisco
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Descrizione del lavoro
Cisco Silicon One is seeking a highly experienced Signal and Power Integrity Technical Leader to guide ASIC packaging and PI/SI efforts across high-speed designs. You will define design rules, lead the SI/PI team, and collaborate with layout and system partners to optimize power and signal integrity across interposer, substrate, and PCB.
The role requires hands-on experience with Keysight ADS, Ansys HFSS/EM, Cadence APD, and SPICE, plus leadership of teams through complex tape-outs and packaging
Competenze
- Bachelor's degree in Electrical Engineering with 10+ years of SI/PI experience
- Experience with multiple high-speed ASIC tape-outs from a package perspective
- Experience with 56G PAM4 and above, high-speed SerDes architectures, channel modeling, BER prediction
- Hands-on lab experience with Keysight ADS, Ansys HFSS/EM flow, and Cadence APD for layout review
- Experience with SPICE
Mansioni
- Define rules for ultra-high-speed signaling to meet power, performance, and area goals
- Analyze substrate SI/PI and collaborate with layout for optimal interposer, substrate, and PCB solutions
- Design, document, and develop ASIC packages for high-volume releases including post-layout extraction
- Lead and mentor the SI team and coordinate with system partners to resolve complex issues
- Promote design reviews, postmortems, and continuous improvement across engineering teams
Conoscenze
Formazione
Strumenti
Descrizione del lavoro
Cisco Silicon One is seeking a highly experienced Signal and Power Integrity Technical Leader to guide ASIC packaging and PI/SI efforts across high-speed designs. You will define design rules, lead the SI/PI team, and collaborate with layout and system partners to optimize power and signal integrity across interposer, substrate, and PCB.
The role requires hands-on experience with Keysight ADS, Ansys HFSS/EM, Cadence APD, and SPICE, plus leadership of teams through complex tape-outs and packaging
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