Remote Senior RTL Design Engineer for AI Data Centers

Delos Data Inc.; United States; À distance; USD 160 000 - 240 000; Plein temps

Avantages offerts par ce poste

Equity

Full benefits

401(k)

Résumé du poste

Delos Data Inc. is a remote-first startup building foundational AI data center technology in the US and Canada.

We seek an experienced RTL design engineer to design and implement RTL for complex subsystems, drive synthesis readiness, and assist in simulation and early silicon debugging. The ideal candidate has a Bachelor's or Master's in EE/CE with 5+ years RTL design experience, strong Verilog/SystemVerilog and microarchitecture skills, and hands-on experience with VCS, Questa, and Verdi.

Qualifications

• Bachelor's or Master's in EE or CE with 5+ years RTL design experience.
• Hands-on Verilog/SystemVerilog and microarchitecture experience.
• Experience with simulation and debug tools like VCS, Questa, Verdi.

Responsabilités

• Design and implement RTL for complex digital subsystems.
• Perform linting, CDC analysis, and ensure synthesis readiness.
• Support integration and debug in simulation and early silicon.

Connaissances

RTL design

Verilog/SystemVerilog

microarchitecture

debugging

Formation

Bachelor's or Master's in EE/CE

Outils

VCS

Questa

Verdi

Description du poste

Delos Data Inc. is a remote-first startup building foundational AI data center technology in the US and Canada.

We seek an experienced RTL design engineer to design and implement RTL for complex subsystems, drive synthesis readiness, and assist in simulation and early silicon debugging. The ideal candidate has a Bachelor's or Master's in EE/CE with 5+ years RTL design experience, strong Verilog/SystemVerilog and microarchitecture skills, and hands-on experience with VCS, Questa, and Verdi.