Remote Senior DFT Engineer - ASIC/SoC Test Architect

Encore Semi Llc; Boston (MA); Remote; USD 135,000 - 150,000; Full time

Benefits offered by this job

PTO 15 days

Holidays 10

Medical benefits

Dental & Vision benefits

Life Insurance

401k (Traditional & Roth)

Tuition reimbursement

Job summary

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture and implementation for complex SoCs in a 100% remote role.

You will collaborate with design and verification teams to drive DFT requirements from RTL through silicon bring-up, ensuring high fault coverage and robust test strategies. The ideal candidate offers 8+ years in ASIC DFT, strong Verilog/SystemVerilog and scripting skills, and hands-on IJTAG (IEEE 1687) experience with Tessent.

Qualifications

• 8+ years in ASIC DFT engineering.
• IEEE 1687 IJTAG architecture experience.
• Expertise with Tessent tool suite.
• Strong Verilog/SystemVerilog and scripting skills.

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan).
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug gate-level simulations (zero-delay and timing-annotated).

Skills

Verilog/SystemVerilog

Scripting (Python/Tcl/Perl)

DFT concepts

IJTAG familiarity

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Tessent

Xcelium

VCS

QuestaSim

Job description

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture and implementation for complex SoCs in a 100% remote role.

You will collaborate with design and verification teams to drive DFT requirements from RTL through silicon bring-up, ensuring high fault coverage and robust test strategies. The ideal candidate offers 8+ years in ASIC DFT, strong Verilog/SystemVerilog and scripting skills, and hands-on IJTAG (IEEE 1687) experience with Tessent.