Senior DFT Engineer - Remote SoC Test & IJTAG Expert

Encore Semi, Inc.; Chandler (AZ); Remote; USD 135,000 - 150,000; Full time

Job summary

Encore Semi, Inc. seeks a Senior DFT Engineer to lead test architecture and implementation for complex SoCs. You will collaborate with design and verification teams to drive DFT requirements from RTL through silicon bring-up, ensuring high-quality test coverage.

Requires 8+ years in ASIC DFT, IJTAG expertise, and strong proficiency with Tessent tools. Remote work in the USA is supported with a competitive compensation package.

Qualifications

• 8+ years of proven industry experience in ASIC DFT engineering.
• IEEE 1687 (IJTAG) architecture, using ICL and PDL formats.
• Deep proficiency with Mentor Graphics Tessent tool suite.

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan) for next-generation ASIC/SoC designs.
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug zero-delay and timing-annotated gate-level simulations.

Skills

ASIC DFT eng

IJTAG (IEEE 1687)

Tessent tools

Verilog/SystemVerilog

Scripting: Tcl/Python/Perl

Education

BS/MS in EE or related field

Tools

Tessent tool suite

Xcelium/QuestaSim/VCS

Job description

Encore Semi, Inc. seeks a Senior DFT Engineer to lead test architecture and implementation for complex SoCs. You will collaborate with design and verification teams to drive DFT requirements from RTL through silicon bring-up, ensuring high-quality test coverage.

Requires 8+ years in ASIC DFT, IJTAG expertise, and strong proficiency with Tessent tools. Remote work in the USA is supported with a competitive compensation package.