Remote Senior DFT Engineer - IJTAG/ASIC Test Architect

Encore Semi Llc; Chandler (AZ); Remote; USD 135,000 - 150,000; Full time

Benefits offered by this job

PTO 15 days/yr

10 holidays/yr

Medical benefits 80% premiums

Dental & Vision 50% premiums

Life Insurance & Disability

401k traditional & Roth

Tuition reimbursement

Job summary

Encore Semi Llc is seeking an experienced Senior DFT Engineer to lead test architecture for complex SoCs. You will collaborate with design and verification teams to drive DFT from RTL to silicon bring‑up, ensuring high fault coverage and robust testability.

The role requires 8+ years in ASIC DFT, deep IJTAG (IEEE 1687) expertise, proficiency with Tessent, and solid Verilog/SystemVerilog plus scripting skills. Position is remote in the USA with comprehensive benefits.

Qualifications

• 8+ years of experience in ASIC DFT engineering.
• Strong IEEE 1687 (IJTAG) expertise with ICL and PDL formats.
• Proficiency with Tessent tool suite for DFT implementation and validation.
• Solid experience with simulations using Xcelium, VCS, or QuestaSim.
• Fluency in Verilog/SystemVerilog and scripting (Tcl/Python/Perl).

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan) for next‑gen ASIC/SoC designs.
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug zero‑delay and timing‑annotated gate‑level simulations.

Skills

Verilog/SystemVerilog

Scripting (Tcl/Python/Perl)

Test architecture

RTL bring-up coordination

Education

BS or MS in Electrical/Computer Engineering

Tools

Tessent (Mentor Graphics)

IJTAG tooling (ICL/PDL)

Job description

Encore Semi Llc is seeking an experienced Senior DFT Engineer to lead test architecture for complex SoCs. You will collaborate with design and verification teams to drive DFT from RTL to silicon bring‑up, ensuring high fault coverage and robust testability.

The role requires 8+ years in ASIC DFT, deep IJTAG (IEEE 1687) expertise, proficiency with Tessent, and solid Verilog/SystemVerilog plus scripting skills. Position is remote in the USA with comprehensive benefits.