Senior DFT Engineer - Remote SoC Test Architect

Encore Semi Llc; Fort Collins (CO); Remote; USD 135,000 - 150,000; Full time

Benefits offered by this job

15 days PTO per year

10 paid holidays per year

Medical benefits 80% covered

Dental & Vision 50% covered

Life Insurance & Disability

401k Traditional & Roth

Tuition reimbursement

Job summary

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture for complex SoCs. You will collaborate with design and verification teams to drive DFT requirements end-to-end from RTL to silicon bring-up, ensuring high test coverage.

The role requires 8+ years in ASIC DFT, expertise in IJTAG (IEEE 1687), and proficiency with Tessent and common simulators (Xcelium/VCS/QuestaSim). Remote work across the USA is supported.

Qualifications

• 8+ years of proven ASIC DFT engineering experience.
• Strong hands-on expertise with IEEE 1687 (IJTAG) architecture (ICL and PDL).
• Deep proficiency with Tessent tool suite.
• Solid simulation/verification/debug skills (Xcelium, VCS, QuestaSim).
• Fluency in Verilog/SystemVerilog and strong scripting (Tcl, Python, or Perl).
• BS or MS in Electrical/Computer Engineering or related field.

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan) for next-gen ASIC/SoC designs.
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug zero-delay and timing-annotated gate-level simulations.

Skills

8+ years ASIC DFT experience

Verilog/SystemVerilog

Scripting (Tcl/Python/Perl)

Education

BS or MS in Electrical/Computer Engineering

Tools

Tessent (Mentor Graphics)

Xcelium

VCS

QuestaSim

Job description

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture for complex SoCs. You will collaborate with design and verification teams to drive DFT requirements end-to-end from RTL to silicon bring-up, ensuring high test coverage.

The role requires 8+ years in ASIC DFT, expertise in IJTAG (IEEE 1687), and proficiency with Tessent and common simulators (Xcelium/VCS/QuestaSim). Remote work across the USA is supported.