Remote Senior DFT Architect for SoCs

Encore Semi Llc; Baltimore (MD); Remote; USD 135,000 - 150,000; Full time

Benefits offered by this job

PTO 15 days / year

Holidays 10 days / year

Medical benefits: 80% premiums

Dental & Vision: 50% premiums

Life Insurance

401k: Traditional & Roth

Life/AD&D and LTD

Tuition reimbursement

Employee Assistance Program (EAP)

Job summary

Encore Semi, Inc. is seeking an experienced Senior DFT Engineer to lead test architecture for complex SoCs. This fully remote position supports teams across the United States and reports to the hardware verification group.

You will design and implement DFT structures, integrate IJTAG networks, perform ATPG and fault coverage, and drive silicon bring-up. A BS/MS in EE and 8+ years of ASIC DFT experience are required.

Qualifications

• 8+ years of ASIC DFT engineering experience.
• Strong hands-on IJTAG architecture and ICL/PDL usage.
• Proficiency with Tessent tools for DFT implementation and validation.
• Proven ability to verify, debug, and integrate DFT across RTL to silicon.

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan).
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug gate-level simulations with timing annotations.

Skills

Verilog/SystemVerilog

Scripting: Tcl/Python/Perl

IJTAG (IEEE 1687)

DFT/ASIC test architecture

Education

BS or MS in Electrical/Computer Engineering

Tools

Tessent (Mentor Graphics)

Xcelium/VCS/QuestaSim

Job description

Encore Semi, Inc. is seeking an experienced Senior DFT Engineer to lead test architecture for complex SoCs. This fully remote position supports teams across the United States and reports to the hardware verification group.

You will design and implement DFT structures, integrate IJTAG networks, perform ATPG and fault coverage, and drive silicon bring-up. A BS/MS in EE and 8+ years of ASIC DFT experience are required.