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AMD invites driven MS students in Electrical/Computer Engineering to join as ASIC Package Engineering intern/co-op, working with a team of engineers on packaging technology and verification.
You will participate in substrate, interposer, and bump design, learn testing, and contribute to cost-efficient materials for performance. This internship is based in San Jose/Santa Clara with full-time hours in hybrid or onsite settings.
AMD invites driven MS students in Electrical/Computer Engineering to join as ASIC Package Engineering intern/co-op, working with a team of engineers on packaging technology and verification.
You will participate in substrate, interposer, and bump design, learn testing, and contribute to cost-efficient materials for performance. This internship is based in San Jose/Santa Clara with full-time hours in hybrid or onsite settings.