ASIC Package Engineering Intern - Hybrid/Onsite

AMD; San Jose (CA); Hybrid; USD 34,000 - 48,000; Full time

Job summary

AMD invites motivated students for ASIC packaging intern/co-op roles in San Jose, CA or Santa Clara. You’ll work full-time (40 hours/week) in a hybrid or onsite structure across multiple internship terms, from Spring/Summer to Summer-Fall.

You will support package design, test vehicles, and verify designs while learning from seasoned engineers. Ideal candidates are enrolled in US universities pursuing EE/EM/CE/related fields; experience with scripting and Power BI is a plus.

Qualifications

• Enrollment in a US-based bachelor's program in EE, CE, Mech, or related field.
• Knowledge of packaging design and design software.
• Experience with Perl, Python, SQL scripting encouraged.
• Familiarity with data analytics tools like Power BI.

Responsibilities

• Assist in prioritizing and optimizing new packaging projects.
• Assist in substrate, interposer, and bump designs for products and test vehicles.
• Support design verification to ensure performance and quality.
• Analyze yield and defect metrics to improve designs and yield.
• Evaluate packaging materials and interact with partners for cost-effective designs.

Skills

Transmission lines and circuits

Scripting languages

Data analytics

Education

Bachelor's degree in Electrical Engineering/Engineering Science/Computer Engineering/Mechanical Engineering/Material Science Engineering

Tools

Packaging design software

Silicon/PCB design software

Job description

AMD invites motivated students for ASIC packaging intern/co-op roles in San Jose, CA or Santa Clara. You’ll work full-time (40 hours/week) in a hybrid or onsite structure across multiple internship terms, from Spring/Summer to Summer-Fall.

You will support package design, test vehicles, and verify designs while learning from seasoned engineers. Ideal candidates are enrolled in US universities pursuing EE/EM/CE/related fields; experience with scripting and Power BI is a plus.