Lead, Advanced Packaging & Chiplet Research

Intel; Phoenix (AZ); On-site; USD 140,000 - 190,000; Full time

Job summary

Intel is seeking a Semiconductor Packaging Integration Research Manager to lead advanced packaging integration research enabling next-generation heterogeneous semiconductor technology. You will guide early-stage strategies across chiplet assembly, 2.5D/3DIC, and wafer-level packaging, balancing performance, power, area, and manufacturability.

You will manage a multidisciplinary team, partner with design, process, reliability, and manufacturing groups, and drive feasibility studies, architecture

Qualifications

• Experience leading multidisciplinary research programs.
• Ability to translate complex integration challenges into actionable plans and milestones.
• Strong understanding of package-system integration, chiplet architectures, interconnects, substrates and reliability trade-offs.
• Excellent communication to executive and cross-functional teams.

Responsibilities

• Lead packaging integration research programs focused on heterogeneous integration and chiplets.
• Define strategy, roadmaps, milestones, and criteria aligned to product and system scaling.
• Manage a multidisciplinary team of researchers, technologists, engineers, and program leads.
• Translate system requirements into package solutions balancing performance, power, area, latency, and manufacturability.
• Partner with design, process, reliability, and manufacturing teams to close cross-domain gaps.
• Drive feasibility studies, architecture trade-offs, and experimental validation for new concepts.
• Conduct technology readiness assessments and manufacturing feasibility reviews for early options.
• Publish IP, benchmark against competitors, and transfer knowledge internally.
• Define qualification gaps, process control needs, and scaling paths for development transfer.
• Communicate progress, risks, and strategic recommendations to senior leaders.

Skills

Advanced packaging

Chiplet architectures

3DIC integration

Cross-functional leadership

Technical storytelling

Power/thermal modeling

Education

PhD in Electrical Engineering

Tools

Ansys

Cadence

MATLAB

Job description

Intel is seeking a Semiconductor Packaging Integration Research Manager to lead advanced packaging integration research enabling next-generation heterogeneous semiconductor technology. You will guide early-stage strategies across chiplet assembly, 2.5D/3DIC, and wafer-level packaging, balancing performance, power, area, and manufacturability.

You will manage a multidisciplinary team, partner with design, process, reliability, and manufacturing groups, and drive feasibility studies, architecture