Mixed‑Signal Design Architect for Next‑Gen HBM Systems

Micron Technology, Inc

Folsom (CA)

On-site

USD 146,000 - 297,000

Full time

8 days ago
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Job summary

Micron Technology, Inc. seeks a Senior/Principal Engineer or Senior Staff to design, simulate, and optimize 3D-stacked, high-performance memories for AI workloads.

You will lead analog/mixed-signal circuit efforts, power delivery architectures, and interface specifications in collaboration with architecture teams. Responsibilities include defining architectures, evaluating thermal and power delivery, and prototyping on-/off-chip interfaces while maintaining clear documentation and advancing

Qualifications

  • Experience with analog and/or mixed-signal design, including simulation and floorplanning.
  • Experience with transistor-level simulation (e.g., FineSim, HSPICE) including corner analysis.
  • Ability to analyze architecture tradeoffs and use findings to develop specifications.
  • Experience with power delivery analysis, tradeoffs, constraints, and challenges.

Responsibilities

  • Design, optimize, and simulate critical analog and/or mixed-signal circuits.
  • Architect and design power delivery for high-performance, stacked memories.
  • Analyze, specify, and prototype on-/off-chip interfaces.
  • Perform timing, area, power, and complexity analysis for high-performance, low-power circuits.
  • Define architectures for improved thermal management.
  • Conduct pathfinding activities for future-generation stacked-memory products.
  • Compose and maintain clear architecture documentation.

Skills

Analog/Mixed-signal design
Architecture tradeoffs
Power delivery analysis
Transistor-level simulation
Circuit timing/area/power analysis
Thermal management concepts
Scripting (Python/Perl)
Verilog (HDL)

Education

Masters/PhD in EE/CS or related field

Tools

FineSim
HSPICE
Verilog
Python
Perl

Job description

Micron Technology, Inc. seeks a Senior/Principal Engineer or Senior Staff to design, simulate, and optimize 3D-stacked, high-performance memories for AI workloads.

You will lead analog/mixed-signal circuit efforts, power delivery architectures, and interface specifications in collaboration with architecture teams. Responsibilities include defining architectures, evaluating thermal and power delivery, and prototyping on-/off-chip interfaces while maintaining clear documentation and advancing

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