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Cisco Systems in San Jose is seeking an ASIC DFT - Emulation Technical Leader to own the DFT emulation strategy for Silicon One. You will architect the pre-silicon emulation roadmap, build a high-performing team, and define validation flows for scan, MBIST, and JTAG on Palladium, Veloce, and Zebu.
You will collaborate with RTL, physical design, ATPG teams and vendors to enable seamless silicon bring-up and push multi-terabit validation, shaping Cisco's next-gen silicon platforms.
Cisco Systems in San Jose is seeking an ASIC DFT - Emulation Technical Leader to own the DFT emulation strategy for Silicon One. You will architect the pre-silicon emulation roadmap, build a high-performing team, and define validation flows for scan, MBIST, and JTAG on Palladium, Veloce, and Zebu.
You will collaborate with RTL, physical design, ATPG teams and vendors to enable seamless silicon bring-up and push multi-terabit validation, shaping Cisco's next-gen silicon platforms.