Emulation & DFT Strategy Lead for ASIC Silicon One

020 Cisco Systems, Inc.; San Jose (CA); On-site; USD 214,000 - 310,000; Full time

Job summary

Cisco Systems, Inc. is seeking an ASIC DFT - Emulation Technical Leader to own and define the DFT emulation strategy for Silicon One—the silicon powering the world’s most advanced multi‑terabit networks.

You will architect the pre-silicon emulation roadmap, build a high-performing engineering team, and drive validation of complex scan, MBIST, and JTAG architectures across platforms like Palladium, Veloce, and Zebu.

Qualifications

• Minimum qualifications include a degree and significant emulation experience on Palladium, Veloce or Zebu.
• Experience with Verilog/SystemVerilog, C/C++, and scripting languages (Tcl, Python, Perl).
• Ability to architect a pre-silicon emulation roadmap and lead a team.

Responsibilities

• Own and define the DFT emulation strategy for Silicon One.
• Architect the pre-silicon emulation roadmap from scratch and build a high-performing team.
• Validate complex scan, MBIST, and JTAG architectures with industry platforms and collaborate across RTL, physical design, and ATPG teams.

Skills

DFT emulation strategy

Verilog/SystemVerilog

C/C++

Scripting (Tcl/Python/Perl)

Education

Bachelors +12 years related experience

Masters +8 years related experience

PhD +5 years related experience

Tools

Palladium

Veloce

Zebu

Job description

Cisco Systems, Inc. is seeking an ASIC DFT - Emulation Technical Leader to own and define the DFT emulation strategy for Silicon One—the silicon powering the world’s most advanced multi‑terabit networks.

You will architect the pre-silicon emulation roadmap, build a high-performing engineering team, and drive validation of complex scan, MBIST, and JTAG architectures across platforms like Palladium, Veloce, and Zebu.