ASIC Packaging Engineer Intern – Co-op

Advanced Micro Devices, Inc.; Austin (TX); Hybrid; USD 22,000 - 33,000; Full time

Job summary

AMD is seeking a highly motivated ASIC Package Engineering intern/co-op to join our team in Austin. You will work with engineers to help bring advanced packaging technology to reality, supporting package design, development, verification and analysis tasks.

You will gain hands-on experience with substrate, interposer and bump designs, design verification, yield analysis, and collaboration with partners to optimize cost and performance.

Qualifications

• Course related to transmission lines and electric circuits.
• Package, silicon or PCB design software.
• Scripting languages - Perl / Python / SQL.
• Semiconductor theory and packaging process/technology.
• Data analytics and data visualization tools like Power BI.

Responsibilities

• Support Package design and development engineers in prioritizing and optimizing new projects.
• Train to complete substrate, interposer and bump designs for AMD products, test vehicles and probe card substrates.
• Assign projects related to design verification implementation to ensure design performance, quality and efficiency.
• Analyze yield and defect metrics to ensure design performance and help improve yield.
• Evaluate and benchmark packaging materials; interact with partners to optimize cost-effective design for performance and yield.

Skills

Transmission lines

Package design software

Scripting: Perl/Python/SQL

Semiconductor theory

Data analytics

Power BI

Education

Master's degree in Electrical Engineering / Engineering Science / Computer Engineering / Mechanical Engineering / Materials Science Engineering or related field

Tools

Power BI

Job description

AMD is seeking a highly motivated ASIC Package Engineering intern/co-op to join our team in Austin. You will work with engineers to help bring advanced packaging technology to reality, supporting package design, development, verification and analysis tasks.

You will gain hands-on experience with substrate, interposer and bump designs, design verification, yield analysis, and collaboration with partners to optimize cost and performance.