ASIC Package Eng Intern: Design & Yield Impact

Advanced Micro Devices, Inc.; Santa Clara (CA); On-site; USD 40,000 - 55,000; Full time

Job summary

Advanced Micro Devices, Inc. seeks a highly motivated ASIC Package Engineering intern/co-op to join our team and work with engineers at the forefront of packaging technology. You will contribute to bringing new packaging designs to reality and gain hands-on experience on AMD products.

You will support substrate/interposer/bump design, verification, and yield analysis, while evaluating materials and collaborating with partners for cost-efficient performance and yield optimization.

Qualifications

• Course work in transmission lines and circuits.
• Experience with package, silicon or PCB design software.
• Familiarity with Perl, Python or SQL scripting.
• Knowledge of semiconductor theory and packaging processes.
• Data analytics and Power BI familiarity.

Responsibilities

• Assist in substrate, interposer and bump design for AMD products and test vehicles.
• Support package design and development engineers in prioritizing and optimizing new projects.
• Contribute to design verification efforts to ensure performance and quality.
• Analyze yield and defect metrics and help improve yield.
• Evaluate packaging materials and collaborate with partners for cost-efficient designs.

Skills

Package design tools

Scripting languages

Semiconductor theory

Data analytics

Power BI

Transmission lines

Education

Bachelor's degree in Electrical engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Material Science Engineering, or related field

Job description

Advanced Micro Devices, Inc. seeks a highly motivated ASIC Package Engineering intern/co-op to join our team and work with engineers at the forefront of packaging technology. You will contribute to bringing new packaging designs to reality and gain hands-on experience on AMD products.

You will support substrate/interposer/bump design, verification, and yield analysis, while evaluating materials and collaborating with partners for cost-efficient performance and yield optimization.