ASIC Package Eng Co-op: Design, Yield & Innovation

Advanced Micro Devices, Inc.; Secaucus (NJ); Hybrid; USD 25,000 - 39,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a highly motivated ASIC Packaging intern/co-op to join our team, working with engineers to bring new packaging technology to reality. You will help with substrate, interposer, and bump designs, and support design verification across projects.

The role involves learning packaging processes, analyzing yield metrics, and collaborating with partners to optimize cost and performance. This is an onsite/hybrid internship spanning multiple 2027 terms.

Qualifications

• This internship/co-op targets a Masters student in electrical or related field.
• Candidates should be pursuing coursework in packaging and semiconductor topics.
• Familiarity with data analytics tools, scripting, and PCB/package design software is encouraged.

Responsibilities

• Assist in substrate, interposer and bump designs for AMD products and test vehicles.
• Support package design and development engineers in prioritizing new projects.
• Help verify design performance, quality and efficiency through verification tasks.
• Analyze yield and defect metrics to improve design yield and reliability.
• Evaluate packaging materials and interact with partners for cost-efficient designs.

Skills

ASIC packaging

Package design software

Data analytics

Python/Perl/SQL

PowerBI

Education

Master's degree in Electrical Engineering or related

Tools

PowerBI

Job description

AMD is seeking a highly motivated ASIC Packaging intern/co-op to join our team, working with engineers to bring new packaging technology to reality. You will help with substrate, interposer, and bump designs, and support design verification across projects.

The role involves learning packaging processes, analyzing yield metrics, and collaborating with partners to optimize cost and performance. This is an onsite/hybrid internship spanning multiple 2027 terms.