3D IC Packaging & Integration Intern (Summer)

GlobalFoundries inc.

Town of Malta (NY)

Hybrid

USD 28,000 - 55,000

Full time

14 days+

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Job summary

GlobalFoundries is seeking a 3D Heterogeneous Integration Development Intern for Summer 2027 in Malta, NY. You will contribute to advanced packaging and process-integration development, performing experiments, analyzing data, and supporting model development with mentorship and collaboration across multiple teams.

You'll work up to 40 hours per week, gain exposure to wafer-to-wafer and die-to-wafer bonding, TSV/TOV and interposer technologies, and participate in the internship program designed

Qualifications

  • Sophomore year of study and pursuing a Bachelor’s or Master’s in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, or related field during the internship.
  • Must maintain an overall GPA of at least 3.0 and be in good academic standing.
  • English language fluency (written and verbal) required.
  • Travel up to 10% and 40 hours per week commitment during the internship.

Responsibilities

  • Plan and perform design of experiments (DOEs) using internal tooling and external partners.
  • Analyze and interpret engineering data from experiments and process optimizations.
  • Develop or support process models for advanced packaging and integration performance.
  • Assist engineers with daily integration, documentation, and problem solving.
  • Collaborate with cross-functional teams to support project objectives and summarize results.

Skills

English proficiency

Education

Bachelor’s or Master’s in Electrical/Mechanical/Chemical/Materials Science

Job description

GlobalFoundries is seeking a 3D Heterogeneous Integration Development Intern for Summer 2027 in Malta, NY. You will contribute to advanced packaging and process-integration development, performing experiments, analyzing data, and supporting model development with mentorship and collaboration across multiple teams.

You'll work up to 40 hours per week, gain exposure to wafer-to-wafer and die-to-wafer bonding, TSV/TOV and interposer technologies, and participate in the internship program designed

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