(Staff/Sr. Staff) NPU Design Engineer

OmniVision Technologies Singapore Pte. Ltd.; Singapore, Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

A leading technology company is seeking a Staff/Sr. Staff NPU Design Engineer to develop cutting-edge digital designs. The role involves optimizing performance and collaborating with various teams to enhance system integration. Candidates should possess significant experience in digital design, especially in NPU and SoC projects, and have a strong educational background in engineering.

Qualifications

• 8+ years of digital design experience, 2-3 of which in SoC design preferred.
• Hands on with RTL coding and microarchitecture design.
• Experience leading a design team of 3-4.

Responsibilities

• Develop design requirements for NPU based on system specifications.
• Optimize micro-architecture design for performance, power, and area.
• Collaborate with verification and software teams for integration.

Skills

Digital design

Microarchitecture design

RTL coding

Verilog

System Verilog

Power analysis

Timing analysis

Team leadership

Communication skills

Deep learning algorithms

Education

MSEE/BSEE in Electrical Engineering or Computer Engineering

Job description

About the job (Staff/Sr. Staff) NPU Design Engineer

Responsibilities

• Develop design requirements of an NPU given system level specifications.
• Being part of modelling the performance of the NPU module and its data transaction throughput.
• Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
• Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
• Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
• Optimizing micro-architecture design for low power and area is required.
• Work closely with verification engineers to ensure comprehensive testing and debug issues.
• Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
• Collaborate with software teams to assist in compiler and toolchain development and their debugging.
• Produce clear and concise design documentation.

Requirements

• 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
• At least one cycle of NPU design completion experience is required.
• Hands on in digital design experience is a must.
• Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
• Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
• Experience in synthesis, with analysis of power, timing and area.
• Disciplined, quality-minded, and highly driven for excellence.
• Excellent team player and good communication skills.
• MSEE/BSEE in Electrical Engineering or Computer Engineering.
• Understanding of convolution operator and number system is required.
• Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
• Experience in UVM verification methodology is a plus.
• A plus to have SoC design experience.
• Experience with optimizing micro-architectures for low-power and low-area is a plus.
• Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
• Experience with past design experience with NPU / GPU / DSP design is a plus.
• Experience with ARM or RISC-V processor systems is a plus.
• Passionate and strong in general programming is a plus.