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A leading semiconductor company in Singapore is seeking a Senior Member of Technical Staff for IC Package Design/Development Quality Assurance. You will be responsible for ensuring the quality and reliability of new package technologies and collaborating with teams to mitigate risks before new product introductions. The ideal candidate has a PhD in relevant engineering fields and over 10 years of experience in semiconductor package design. This position requires expert knowledge in reliability test methods and Chip-Package Interaction.
As a GQ (Global Quality) Senior Member of Technical Staff (SMTS) focused on IC Package Design/Development Quality Assurance (Pkg DDQA) at Micron Technology Inc., you will be responsible for the quality and reliability of new package technology introductions, focused on advanced memory solutions. You will work with Technology Development and Engineering teams to ensure that Chip-Package Interaction risks are understood and mitigated prior to New Product Introduction. This responsibility includes understanding product interactions with customers’ integration processes and field operations, designing and coordinating reliability/characterization testing plans, and developing fundamental understanding of failure mechanisms to mitigate risk. You will also act as a subject matter expert to ensure effective root cause analysis for quality issues related to package technology, and you will ensure that lessons learned are addressed in next-generation technologies. You will work with customer-facing teams to draft and present content to address customer issues and requests. You are also expected to contribute to the advancement of technology at Micron through mentoring, publishing technical papers (internal and external), and developing innovative solutions.
Execute technical risk assessment and NUDD (New, Unique, Different, Difficult) analysis when new designs and/or design rules are introduced and lead execution of risk mitigation.
Develop holistic qualification plans and coordinate execution.
Provide recommendations on release of new package technologies based on test results and technical risk assessment.
Provide SME input to problem solving for package technology related issues to ensure effective root cause analysis and corrective/preventive actions.
Work with customer-facing teams to draft and present content to address customer issues and requests.
PhD degree in Engineering & Science –Electrical & electronics, mechanical, material science and engineering, physics, or related field of study
10+ years’ experience in semiconductor package design, manufacturing or Q&R
Experience with advanced packaging technologies (e.g., 3DI, Wafer-2-Wafer, SiP)
Expert-level applied knowledge of package-level and board-level reliability test methods, reliability acceleration modeling, and sampling statistics.
Expert-level understanding of Chip-Package Interaction and the effects thermomechanical and hygroscopic swelling stresses on reliability.
Thorough knowledge of semiconductor package designs and challenges.
Knowledge of package/assembly processes, board level reliability, and challenges.
Understanding of mechanical and material interaction effects on reliability of IC components and/or printed circuit board (PCB) assemblies.
Understanding of statistics and quality management (SPC, FMEA, 8D CAR, etc.)
Must be self-motivated, able to work independently, and detail oriented.
Strong analytical problem-solving skills, excellent multi-tasking skills and the ability to interact easily with other groups.