senior IC layout engineer

ASTRAWAVE TECHNOLOGY PTE. LTD.; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

A technology company specializing in chip development based in Singapore is seeking experienced analog mixed signal layout and CAD designers to join their team. In this role, you will work closely with circuit design engineers to optimize layouts for high speed/RF solutions. Preferred qualifications include at least 6 years of layout engineering experience and familiarity with industry-standard CAD tools such as Cadence. Candidates should have a diploma or bachelor’s degree in electrical, computer, or electronics engineering.

Qualifications

• At least 6 years of hands-on working experience in layout engineering.
• Experience working on high-speed or RF layout.
• Good understanding of AMS layout fundamentals.

Responsibilities

• Realize layout design from schematic presentation.
• Conduct DRC/LVS/ERC and necessary physical verification.
• Participate in post layout adjustments and block/IP activities.

Skills

Analog mixed signal layout design

CAD design

Team player

Automation (perl/python/tcl)

Education

Diploma or bachelor's in electrical/computer/electronics engineering

Tools

Cadence

Job description

Job Description

ASTRAWAVE develops chips for Data Processing, IP Licensing, Network, Bus, ChipletInterconnect as well as Chip Customization for different customers. We are currently seeking experienced analog mixed signal layout and CAD designers to join our team in the development of high speed/RF solutions which will be used to complement our current products.

The Person

• Work closely with circuit design engineers to optimize layout to meet specification.
• Team player and strong commitment to schedules.
• Able to work in a multi-cultural environment.

Key Responsibilities

Realize layout design from schematic presentation.

Layout design implementation includes the following functions:

• Floor planning and device placement
• Power and Signal routings and Integrity optimization
• DRC/LVS/ERC/ANT/ESD/PERC/LVL and necessary Physical Verification
• Passing DRC rules and ensuring LVS
• Preparing material and reviewing of layout
• Checklist/Methodology to ensure quality of layout
• Layout methodology and enhancement

Participate in post layout adjustments and block/IP activities.

Good understanding of AMS layout fundamentals/EMIR/RC delay/DecouplingCaps/Latch-up.

Preferred Experience

• Experience working on technology node below 16nm.
• Experience working on high-speed or RF layout.
• Experience in TX/RX/PLL/ADC/DAC/etc. is a plus.
• Experience working with Cadence skills or equivalent tools for pcell development(perl/python/tcl) and automation to increase layout productivity.
• Understanding of process technology and circuit design.
• Understanding of analog layout physical verification CAD setup.
• At least 6 years of hands‑on working experience in layout engineering.
• Experience working with leading industry CAD tools, methodology and finfet technology.
• Experience with analog/digital on top (chip-top) integration is a plus point.
• Providing layout guidance to juniors ensuring quality layouts.

Academic Credentials

Diploma or bachelor’s in electrical/computer/electronics engineering or equivalent.