R&D ANALOG IC DESIGN ENGINEER

THE TALENT PEOPLE PTE. LTD.; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

A recruitment firm in Singapore is seeking an experienced engineer with a strong background in Analog/Mixed-Signal IC design to contribute to the Precision Engineering sector. Candidates should have a PhD or Master's degree in Electrical Engineering or Microelectronics and at least 3 years of relevant experience. The role involves developing Analog circuits, conducting system-level analysis, and collaborating closely with layout engineers. Strong communication and teamwork skills are essential for success in this position.

Qualifications

• Min 3 years of experience in CMOS Analog IC design and simulation.
• Strong design knowledge in ESD and Latch up.
• Ability to develop simple design-related scripts using common scripting languages.

Responsibilities

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• Conduct system-level analysis and full-chip architecture design.
• Collaborate with layout engineers to ensure proper chip floor planning.

Skills

Analog IC design

Mixed-Signal IC design

Communication skills

Team player

Scripting (perl, Tcl, matlab)

Education

PhD / Master / Degree in Electrical Engineering or Microelectronics

Tools

Spice

Job description

The Talent People x JSIT-PE
The Talent People is proud to partner with JSIT-PE, a government initiative aimed at strengthening Singapore’s Precision Engineering sector by addressing manpower challenges and fostering industry growth.
By applying for our job opportunities, you’re joining a strategic effort to enhance Singapore’s Precision Engineering landscape.

Key Responsibilities:

• Development of Analog/Mixed-Signal circuits from specifications to prototypes.
• System-level analysis and evaluation, full-chip architecture design, analysis, modeling, simulation, and integration.
• Schematic entry, corner simulation, layout consideration, and post layout simulation.
• Work closely with the layout engineer to conduct the physical implementation (layout) and chip floor planning.
• Responsible for post-layout extraction and parasitic analysis.
• Able to work with other designers, Chip Architects, and layout engineers to achieve full-chip integration, place and route, top-level verification, and tape out.

Requirements / Qualifications:

• PhD /Master/Degree in Electrical Engineering or Microelectronics with excellent technical background in Analog /Mixed-Signal IC design
• Min. 3 years of experience in CMOS Analog IC design and simulation
• Good design experience in Analog IC design involving two or more of the following blocks: low noise pre-amplifier (low offset, high CMRR, high PSRR and bandwidth up to 600MHz), CMOS Gigahertz Oscillator, switched capacitor circuit, LDO, Differential Amplifier, comparator, Opamp, TIA, and Bandgap Reference and high-frequencyLatch-up full-wave rectifier, etc
• Good design knowledge in ESD and Latch up
• Experience in isolator devices (capacitive-coupler or optical-coupler), and detectors-associated circuits will be an added advantage.
• Experience with sigma-delta modulator, IO drivers, will be an added advantage
• Good working knowledge of relevant analog IC design and simulation tools (Spice or its equivalent)
• Basic understanding and can develop a simple design-related script with some common script languages, such as perl, Tcl, matlab or cadence skill etc.
• A team player with good communication skills.Able to work independently, flexible, and creative.