DRAM Layout Engineer Intern — CMOS & EDA Focus

micron; Xalisco; Presencial; MXN 89.000 - 179.000; Jornada completa

Descripción de la vacante

Micron Technology is seeking a student intern to develop and verify high-quality physical layouts for cutting-edge DRAM products. You will gain hands-on experience with layout building, physical verification, and industry-standard EDA tools like Cadence and Calibre under the guidance of experienced engineers.

Responsibilities include floor planning, layout design, and following verification protocols while collaborating with global teams.

Formación

• Pursuing a bachelor’s degree in Electrical/Electronics/Mechatronics, Robotics, or a related field.
• Completed coursework or projects in microelectronics, semiconductor devices, VLSI, or IC design.
• Basic understanding of CMOS technology and layout design principles.

Responsabilidades

• Design and verify analog and digital layouts across all levels.
• Use CAD tools (Cadence, Calibre, etc.) for layout tasks.
• Collaborate with design engineers to floor plan and design layout.

Conocimientos

CMOS basics

Circuit design

Python scripting

Linux basics

Analytical thinking

Educación

Bachelor's degree in Electrical/Electronics/Mechatronics or related

Herramientas

Cadence Virtuoso

Calibre

Synopsys IC Compiler II

Fusion Compiler

Descripción del empleo

Micron Technology is seeking a student intern to develop and verify high-quality physical layouts for cutting-edge DRAM products. You will gain hands-on experience with layout building, physical verification, and industry-standard EDA tools like Cadence and Calibre under the guidance of experienced engineers.

Responsibilities include floor planning, layout design, and following verification protocols while collaborating with global teams.