DRAM Layout Design Engineer

3050 Micron Semiconductor Mexico, S.de R.L. de C.V.; Jalisco; Presencial; MXN 693.962 - 1.040.943; Jornada completa

Descripción de la vacante

3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout and develop methodologies for issue resolution. You will collaborate with design and other engineering teams to apply various layout techniques.

The ideal candidate will have over 4 years of experience with Cadence VLE/VXL and Calibre DRC/LVS, a Bachelor's degree in Electrical or related fields, and a strong electrical engineering background. Responsibilities include designing and verifying analog and digital layouts.

Formación

• 4+ years of experience in Cadence VLE/VXL and Calibre DRC/LVS.
• Strong electrical engineering background is essential.
• Understanding verification protocols is required.

Responsabilidades

• Design and verify all levels of analog and digital layout.
• Use CAD software for layout design and verification.
• Apply layout techniques for digital and analog circuits.

Conocimientos

Cadence VLE/VXL

Calibre DRC/LVS

Electrical Engineering

Automation Techniques

Educación

Bachelor’s degree in Electrical, Electronics, Mechatronics, Robotics, Biomedical Engineering

Herramientas

Cadence

Calibre

Virtuoso

Descripción del empleo

3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout and develop methodologies for issue resolution. You will collaborate with design and other engineering teams to apply various layout techniques.

The ideal candidate will have over 4 years of experience with Cadence VLE/VXL and Calibre DRC/LVS, a Bachelor's degree in Electrical or related fields, and a strong electrical engineering background. Responsibilities include designing and verifying analog and digital layouts.