Atom CPU Layout Engineer - High-Performance VLSI

Intel

Región Centro

On-site

MXN 360,000 - 600,000

Full time

2 days ago
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Job summary

Intel in Guadalajara, Mexico is seeking an Atom CPU Layout Design Engineer to join a skilled team responsible for physical design of memory compilers, custom IP blocks, and layout partitions.

The role requires a Bachelor's in a related field, at least 6 months of layout experience, and advanced English; this is an on-site position that emphasizes collaboration with circuit designers and problem solving.

Qualifications

  • Bachelor's degree in Electrical/Electronics/Computer Engineering or related field.
  • 6+ months of experience in layout design.
  • Advanced English level.

Responsibilities

  • Ensuring all physical design implementations follow best-in-class layout methodologies and deliver highly efficient, high-quality results.
  • Independently performing and driving complex physical design assignments across multiple design stages.
  • Working closely with circuit design engineers to interpret schematics and translate them into optimized physical layouts.
  • Contributing across the full design flow—from leaf-level cell layout to block-level and top-level integration.
  • Partnering with SoC teams and cross-site design groups to ensure alignment, reuse, and consistency across projects.
  • Developing or enhancing layout scripts, macros, and automation solutions to improve productivity and design robustness (a strong plus).

Skills

Layout design
Advanced English
Problem solving

Education

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field

Job description

Intel in Guadalajara, Mexico is seeking an Atom CPU Layout Design Engineer to join a skilled team responsible for physical design of memory compilers, custom IP blocks, and layout partitions.

The role requires a Bachelor's in a related field, at least 6 months of layout experience, and advanced English; this is an on-site position that emphasizes collaboration with circuit designers and problem solving.

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