DFT Engineer with ATPG

ElevarSoC Technologies; Hyderabad; On-site; INR 1,400,000 - 2,100,000; Full time

Benefits offered by this job

Job summary

ElevarSoC Technologies in Hyderabad is hiring a HW DFT Engineer with 4+ years of experience to work on DFT concepts in SCAN, ATPG and simulations. Prior exposure to Mentor tools for DRC and coverage analysis is preferred. Independent task handling is required.

Good exposure to ATPG, timing vectors, and coverage analysis. Experience in a product or Qcom-like environment is a plus. Immediate joining is desirable.

Qualifications

• ATPG trace (DRC), Stuck at and TDF Coverage Analysis
• ATPG no timing and timing vector simulations

Skills

ATPG trace

Stuck-at

TDF Coverage

Timing vector

Job description

We are hiring for HW DFT Engineer with 4+Years of Experience for Hyderabad location.

Below the jd

Job Function

3-5 years of experience with Good DFT concepts in SCAN, ATPG and Simulations.

Good exposure to Synth, ATPG tools (Mentor) : DRC & coverage analysis, Timing/no timing (VCS) simulations.

Anyone already worked for Qcomm/product company is preferable.

Candidate should be independent in handling the given task.

Mandatory Skills:

ATPG trace (DRC), Stuck at and TDF Coverage Analysis

ATPG no timing and timing vector simulations