Staff Machine Learning ASIC Design Engineer

Qualcomm; Markham; On-site; CAD 124,000 - 175,000; Full time

Job summary

A leading technology company is seeking an ASIC design engineer in Markham, Canada. This position involves developing world-class solutions in AI/ML hardware IP. Candidates should possess a Bachelor's degree in a relevant field with significant ASIC design experience. Responsibilities include designing micro-architectures, creating RTL designs, and collaborating with verification teams. The pay range is $124,200 - $174,200 annually, and the company offers a competitive benefits package including bonuses and RSU grants.

Benefits

Competitive benefits package

Annual discretionary bonus program

Opportunity for RSU grants

Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of relevant experience.
• Strong experience in ASIC design, verification, validation, integration.
• Legally permitted to work on-site in Canada.

Responsibilities

• Develop Micro-Architecture based on high-level design requirements.
• Create RTL design optimized for performance, area, and power.
• Work closely with verification teams to debug and analyze reports.

Skills

Experience in ASIC design

Verilog and System Verilog

Analytical skills

Strong communication skills

Collaboration skills

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Tools

Simulation tools (VCS, Verdi, Modeltech/Questa, Xcelium)

Scripting languages (PERL, Python, TCL, C)

Static Timing tools (Primetime)

Job description

Overview

Company: Qualcomm Canada ULC

Job Area: Engineering Group, Engineering Group > ASICS Engineering

General Summary:

QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology. We are searching for an ASIC design engineer interested in developing world-class solutions for the next generation of AI/ML HW IP. New Position

Minimum Qualifications

• Bachelors degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Masters degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Principal Duties

• Develop of Micro-Architecture and specification based on high level design requirements
• Develop RTL design that meets required performance and is optimized for Area and Power
• Integrate pre-verified sub-IPs to build up larger functionality
• Flow bring up and report analysis for Linting, RTL Synthesis, CLP, CDC
• Work closely with verification team to define testplan, debug regression, analyze coverage reports
• Develop SVA assertions for white box verification for formal verification
• Effective communication across teams, multitasking and well-planned execution of the tasks.

Preferred Qualifications

• Prior experience delivering Verilog and System Verilog RTL
• Detail oriented with strong analytical and debugging skills
• Strong communication (written and verbal), collaboration, and specification skills
• Practiced design knowledge working with some of the following concepts:
  • Clock domain crossing and reset architecture
  • Machine Learning HW development
  • FIFOsimplementation
  • Busimplementation/verificationtechniques
  • Memory selection and control
  • High speed and low power design optimization
  • Bus interface protocols (AHB, AXI)
• Experience with some of the following
  • Simulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)
  • Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)
  • Scripting languages (PERL, Python, TCL, C, etc.)
  • Power Intent and Analysis: UPF, CLP, PTPX, PowerPro
  • Synthesis: DCG/NXT, FC
  • Static Timing: Primetime
  • Formal Verification: Conformal, Formality

Minimum Qualifications

• Legally permitted to work on-site in Canada
• 5+ years of ASIC design, verification, or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$124,200.00 - $174,200.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. Our benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers.