Camera Design Engineer

Qualcomm; Vancouver; On-site; CAD 90,000 - 120,000; Full time

Job summary

A leading technology company in Vancouver is seeking an experienced ASIC design engineer to work on innovative image and video processing projects. The ideal candidate has 3+ years of experience in Verilog RTL design and design verification. Strong communication skills are essential as the role involves cross-functional collaboration. This is an exciting opportunity to be part of a fast-paced team.

Qualifications

• 3+ years of industry experience in Verilog or VHDL RTL design.
• Experience with Design Verification processes.
• Familiarity with RTL sanity tools for design rule checking.

Responsibilities

• Collaborate with hardware/system architects for HW design.
• Run synthesis and perform design rule checks.
• Work closely with verification engineers to develop test plans.

Skills

Verilog RTL design

Design Verification

Bus protocols like AHB, AXI

Image, Video, Graphics, Multimedia Processing

TCL/Perl/Python/shell scripting

Education

Bachelor's degree in Computer Engineering

Master's degree in Computer Engineering

PhD in Computer Engineering

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > Camera Engineering

General Summary:

The Multimedia Camera HW team is looking for a strong ASIC design engineer for an exciting opportunity to be involved in the design of world‑class image and video processing blocks. As a member of the team, the candidate will be responsible for the following:

• Collaborate with hardware/system architects to micro‑architect/design HW specific to Multimedia and Camera Image
• Signal Processing algorithms
• Own and deliver core level IP
• RTL design
• Run synthesis, review results to ensure desired QoR is met.
• Perform design rule checks, low power checks, cross‑clock‑domain (CDC) checks.
• Evaluate performance, area, power, and system cost tradeoffs
• Work closely with design verification engineers to develop test plans and reference bus‑functional models
• Implement and debug tests at both the module and core level throughout the development cycle
• Create and maintain design documents.
• The environment is fast‑paced and requires cross‑functional interaction on a daily basis. Good communication, planning and execution skills are a must.

Ideal candidate to have 3+ years of industry experience in:

• Verilog or VHDL RTL design
• Design Verification
• Bus protocols like AHB, AXI
• Image, Video, Graphics, Multimedia Processing, or DSP
• Experience with RTL sanity tools specific to Design Rule Checking, Clock Domain Crossing checks, Synthesis, Timing analysis, Low power checks

Preferred Qualifications:

• Experience with System Verilog or System C
• ASIC implementation of Image Processing Camera IP
• Experience working with synthesis and physical design teams
• TCL/Perl/Python/shell scripting skills a major plus

Minimum Qualifications:

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. For reasonable accommodations, email [e-mail] or call our toll‑free number. Qualcomm will provide accommodations to support individuals with disabilities in the hiring process.

If you would like more information about this role, please contact Qualcomm Careers.