Video ASIC Design Intern — High-Impact Hardware

Centro Escolar University; San Jose (CA); Sur place; USD 51 000 - 73 000; Temps partiel

Avantages offerts par ce poste

Health insurance

Life insurance

Wellbeing benefits

10 paid holidays per year

Paid sick time

Housing allowance eligibility for_int

Résumé du poste

Centro Escolar University seeks candidates for a video silicon IP role in San Jose, CA. You will design accelerators for video encoding and processing as part of the Video Silicon IP team, collaborating with architecture, algorithm, and verification groups to deliver high-performance, low-power ASIC IPs.

Applicants should be pursuing a Master’s degree in CS or EE, possess knowledge of video codecs, and have experience with SystemVerilog/HLS, UVM, SystemC, or DPI.

Qualifications

• Pursuing a Master’s degree in computer science, electrical engineering, or a related technical discipline.
• Knowledge of video codecs.
• Experience with RTL design using SystemVerilog or High-Level Synthesis (HLS).
• Experience with UVM methodology, SystemC, or DPI.
• Good programming skills in Python for task automation.

Responsabilités

• Design hardware accelerators for advanced video encoding and processing as part of the Video Silicon IP team.
• Collaborate closely with architecture, algorithm, and verification teams to build high-performance and low-power video processing ASIC IPs.
• Apply knowledge of computer architecture and ASIC design to create designs for compressing and processing still images and videos.

Connaissances

Video codecs

Python programming

Formation

Master's degree in CS/EE or related

Outils

SystemVerilog

HLS

UVM

SystemC

DPI

Description du poste

Centro Escolar University seeks candidates for a video silicon IP role in San Jose, CA. You will design accelerators for video encoding and processing as part of the Video Silicon IP team, collaborating with architecture, algorithm, and verification groups to deliver high-performance, low-power ASIC IPs.

Applicants should be pursuing a Master’s degree in CS or EE, possess knowledge of video codecs, and have experience with SystemVerilog/HLS, UVM, SystemC, or DPI.