Graduate ASIC Design Engineer – Video Codec

ByteDance; San Jose (CA); On-site; USD 190,000 - 317,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

401(k) matching

Paid parental leave

Disability insurance

Life insurance

Wellbeing benefits

Paid holidays

Paid sick days

Paid personal time

Job summary

ByteDance is seeking an ASIC Design Engineer to join the Video Silicon IP team in the US. You will collaborate with architecture, algorithm and verification teams to develop high-performance, low-power video processing IPs and ASIC blocks for compressing and processing images and videos.

The role emphasizes strong coursework in video codecs, RTL/SystemVerilog or HLS, UVM/SystemC, and Python automation. The successful candidate should have a Master’s in CS/EE and will contribute to a fast-growing

Qualifications

• Master's degree in Computer Science, Electrical Engineering or related discipline
• Knowledge of Video Codecs
• Experience with RTL design (SystemVerilog) or High level Synthesis (HLS)
• Experience with UVM methodology, SystemC, or DPI
• Good programming skills in Python for task automation

Responsibilities

• As an ASIC Design Engineer in this Video Silicon IP team, we work closely with architecture, algorithm and verification teams to build high performance and low power video processing IPs.
• Apply your knowledge of computer architecture and ASIC design to create ASIC design for compressing, processing still images and videos.

Skills

Video codecs

RTL design (SystemVerilog)

High Level Synthesis (HLS)

UVM/SystemC/DPI

Python programming

Education

Master's degree in Computer Science or Electrical Engineering

Job description

ByteDance is seeking an ASIC Design Engineer to join the Video Silicon IP team in the US. You will collaborate with architecture, algorithm and verification teams to develop high-performance, low-power video processing IPs and ASIC blocks for compressing and processing images and videos.

The role emphasizes strong coursework in video codecs, RTL/SystemVerilog or HLS, UVM/SystemC, and Python automation. The successful candidate should have a Master’s in CS/EE and will contribute to a fast-growing