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Google is seeking an ASIC Design Verification Engineer to shape the TPU hardware verification effort in Sunnyvale, CA. You will verify complex digital designs and drive TPU architecture integration within AI/ML systems, contributing to Google's cutting-edge AI hardware.
In this role you will perform direct verification on active projects and develop verification strategies using SystemVerilog/Verilog, UVM, and constrained-random techniques to ensure robust tape-out readiness.
Google is seeking an ASIC Design Verification Engineer to shape the TPU hardware verification effort in Sunnyvale, CA. You will verify complex digital designs and drive TPU architecture integration within AI/ML systems, contributing to Google's cutting-edge AI hardware.
In this role you will perform direct verification on active projects and develop verification strategies using SystemVerilog/Verilog, UVM, and constrained-random techniques to ensure robust tape-out readiness.