Senior ASIC Verification Engineer - TPU AI Hardware

Google; Sunnyvale (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Google LLC is seeking a verification engineer to contribute to AI/ML silicon; you will verify complex digital designs and TPU architectures within Google's TPU platforms. You will participate in the full verification lifecycle, from planning to test execution, and help drive coverage to tape-out readiness.

Ideal candidates bring deep experience in digital verification methods, SystemVerilog/UVM, and the ability to collaborate across design and verification teams to ensure robust silicon

Qualifications

• Experience verifying digital designs and architectures.
• Familiarity with verification environments and methodologies.
• Ability to contribute to silicon tape-out readiness.

Responsibilities

• Verify complex digital designs and TPU architectures within AI/ML systems.
• Participate in full verification lifecycles from planning to test execution.
• Build constrained-random environments and drive coverage goals.

Skills

Digital design verification

Constrained-random testing

SystemVerilog

RTL/Verilog

Education

Bachelor's degree in Electrical Engineering or Computer Science

Tools

UVM

Verilog

SystemVerilog

Job description

Google is building the future of AI/ML hardware acceleration through TPU engineering. This role focuses on verification of complex digital designs and TPU architecture within AI/ML systems, collaborating with design and verification engineers to ensure robust silicon solutions for Google's TPU and related platforms.

You will participate in full verification lifecycles, from planning to test execution, building constrained-random environments, and driving coverage to tape-out readiness, in an