AI/ML ASIC Verification Engineer for TPU Silicon

Google LLC; Sunnyvale (CA); On-site; USD 138,000 - 197,000; Full time

Job summary

Google LLC in Sunnyvale, CA is seeking an experienced ASIC Design Verification Engineer focused on Machine Learning accelerators. You will verify complex digital designs for TPU-related silicon, developing constrained-random environments with SystemVerilog and UVM, and collaborating across design and validation teams to tape out high-quality silicon.

The role emphasizes teamwork, strong problem-solving, and clear communication, with opportunities to influence TPU architecture and integration in

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.

Responsibilities

• Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry-leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Skills

Problem solving

Communication

Education

Bachelor's degree or equivalent

Tools

SystemVerilog

Verilog

UVM

SVA

Job description

Google LLC in Sunnyvale, CA is seeking an experienced ASIC Design Verification Engineer focused on Machine Learning accelerators. You will verify complex digital designs for TPU-related silicon, developing constrained-random environments with SystemVerilog and UVM, and collaborating across design and validation teams to tape out high-quality silicon.

The role emphasizes teamwork, strong problem-solving, and clear communication, with opportunities to influence TPU architecture and integration in