Technical Director, High-Speed Packaging & SiP

SiMa.ai, Inc.; San Jose (CA); On-site; USD 231,000 - 358,000; Full time

Benefits offered by this job

Private equity

Benefits package

Job summary

SiMa.ai, Inc. seeks a Technical Director of Packaging Engineering in San Jose, CA to lead high-speed packaging development for LPDDR5x/6, PCIe Gen5, and related interfaces.

You will own SI/PI design, lab correlation, and supplier relationships, driving architecture through mass production with a focus on cost, quality, and reliability. The role requires hands-on experience with advanced substrates, 2.5D/Chiplet concepts, and cross-functional leadership across Design, Hardware, and QA teams.

Qualifications

• Hands-on SI/PI design and simulation for high-speed DRAM (LPDDR5x/6) and PCIe Gen5.
• Experience with UCIe channels and PDN at package and board level, with lab correlation.
• Package substrate design including bump/ball map and stack-up.
• SiP experience with multi-die and memory integration; related assembly challenges.
• Proven OSATs and substrate supplier management from design through mass production.
• Automotive package qualification and NPI-to-mass-production experience (AEC-Q100, PPAP).
• Strong understanding of high-speed mixed-signal FCBGA packaging development.

Responsibilities

• Own SI/PI for high-speed interfaces - LPDDR5x/6, PCIe Gen5, 10G Ethernet, MIPI.
• Lead package development from architecture to mass production, balancing cost and quality.
• Define and implement FCBGA and SiP packaging strategies with cross-functional teams.
• Drive OSAT and substrate supplier relationships, negotiations, and qualification roadmaps.
• Oversee packaging NPI including characterization and board-level reliability.
• Manage package production control, issues resolution, and yield improvement.
• Support RMA and FA activities with QA and Design teams.
• Represent Packaging Engineering to customers and lead a design team.

Skills

SI/PI design

High-speed interfaces

LPDDR5x/6

PCIe Gen5

Channel & PDN simulation

Lab correlation

Package architecture

Thermo-mechanical design

coordination with Design, Hardware &Q

Education

BS/MS in Electrical/Mechanical/Materials

Tools

Ansys HFSS/SIwave

Cadence Sigrity/Clarity

Keysight ADS

Cadence APD+/SiP Layout

Job description

SiMa.ai, Inc. seeks a Technical Director of Packaging Engineering in San Jose, CA to lead high-speed packaging development for LPDDR5x/6, PCIe Gen5, and related interfaces.

You will own SI/PI design, lab correlation, and supplier relationships, driving architecture through mass production with a focus on cost, quality, and reliability. The role requires hands-on experience with advanced substrates, 2.5D/Chiplet concepts, and cross-functional leadership across Design, Hardware, and QA teams.