System Design Engineer

Business Intelli solutions; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Job summary

Cirrascale is seeking a Systems Design Engineer for an on-site, first-shift role in the Austin/Santa Clara labs. You will troubleshoot complex hardware/software issues in data center environments, using JIRA for ticketing, and collaborate with OEMs, ODMs, and internal teams to drive resolution.

You will install and replace hardware, debug firmware and OS related to GPUs, and monitor lab conditions while contributing to continuous improvement across the organization.

Qualifications

• Strong analytical and problem-solving skills.
• Proven ability to lead teams and drive issues to resolution.
• Excellent verbal and written communication skills.

Responsibilities

• Work issues through a JIRA ticket.
• Debug platforms/systems; ensure priority items get attention.
• Communicate clearly in tickets to explain current state of issues or systems.
• Take direction from leaders based on priority needs of the business.
• Work with partners, vendors, ODMs, OEMs on issues and ensure clear communication.
• Drive continuous improvement within the organization.
• Self-driven expertise in debugging and root causing issues.
• Understand and apply details to tickets quickly.
• Strong communication and teamwork.
• Proven track record in Data Center environments on complex systems.
• Knowledge in JIRA, scripting, and Debug methodologies (BMC, BIOS, GPU).
• Linux skills to run automated scripts, review logs, and provide updates.
• Experience working with OEM partners and vendors.
• Proficiency with standard hardware lab equipment (dediprog, scopes, forklifts, lift tools).

Skills

JIRA

Scripting

Debugging

Linux

GPU hardware

Hardware lab tools

Communication

Teamwork

Tools

BMC

BIOS

Job description

Job Title: Systems Design Engineer - Austin/Santa Clara

The Role

Data Center Platform Engineering Group (DPEG) is looking for on-site (mandatory) 1st shift Systems Design Engineer that can work complex issues/problems as they arise in the lab or Data Center.

Person will be responsible for going through a ticketing system to check tickets that come in during the individuals working hours: debugging SW and HW problems root causing and fixing said issue.

As well, person should be able to monitor the lab/data-center for any issues such as power outages, network outages, liquid cooling leaks, etc…

Person should have the ability to physically install and replace hardware, debug FW and OS issues especially related to GPUs.

Knowledge of Data Center systems that have CPU and GPUs – role requires individual to be technician and engineer.

Key Responsibilities:

• Work issues through a JIRA ticket
• Debug platforms/systems; work ticketing system to ensure priority items are getting attention
• Communicate clearly in tickets to explain the current state of an issue or systems
• Take direction from leaders based on priority needs of the business
• Work with partners, vendors, ODMs, OEMs on issues and ensure clear communication
• Drive continuous improvement within the organization
• Self driven expertise in debugging problems and root causing issues
• Ability to quickly understand and apply specific details to tickets
• Strong communication skills and ability to work well as part of a team
• Proven track record of working in a Data Center on complex systems
• Knowledge in JIRA, scripting, Debug methodologies (BMC, BIOS, GPU)
• Linux skills w/ ability to do run given automated scripts, look at logs, give updates
• Experience working and communicating with OEM partners and vendors
• Proficiency with all standard hardware lab equipment (dediprog, scopes, forklifts, lift tools)

Preferred Experience for Design Reliability Engineer:

• Strong analytical and problem-solving skills.
• Proven ability to lead teams and drive issues to resolution.
• Excellent verbal and written communication skills.

1st Shift - roughly 8am-5pm.

Candidate will work onsite at a Cirrascale location (off of Wells Branch/Loop 1).

Travel flexibility is required between AMD labs/facility.