SRAM Design Lead: Architect High-Performance Memory

Micron Technology, Inc.

Boise (ID)

On-site

USD 153,000 - 267,000

Full time

4 days ago
Be an early applicant

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Micron Technology, Inc. in Boise, Idaho seeks an experienced SRAM Design Engineer to develop high-performance, low-power embedded memory IP and testchip content across advanced technologies.

You will lead architecture definition, transistor-level circuit design, layout interface, and pre-/post-silicon validation, collaborating with layout, CAD, process, test, and product teams to deliver production-ready memory solutions.

Qualifications

  • Experience in SRAM, register-file, ROM, or other memory circuit design.
  • Strong knowledge of CMOS transistor-level design, memory architecture and timing.
  • Hands-on with Cadence Virtuoso and SPICE-class simulators.
  • Experience with PVT corners, Monte Carlo, and post-layout analyses.
  • Ability to translate requirements into architecture, verification plans, and release criteria.
  • Collaborates with layout, CAD, process/foundry, verification, product, and chip testing teams.
  • Clear technical communication and problem-solving skills.
  • Structured working style and ability to debug complex circuits.

Responsibilities

  • Design and optimize custom SRAM, register-file, and embedded-memory circuits.
  • Develop and verify memory-array subsystems including bitcell arrays and decoders.
  • Evaluate stability, performance, leakage, power and area across conditions.
  • Own transistor-level simulation and signoff across tools and corners.
  • Drive SRAM PPA optimization through sizing and architectural choices.
  • Define timing, power, noise, and functional characterization methodologies.
  • Partner with layout engineers on floorplanning and routing.
  • Support memory-compiler development with configurations and checks.
  • Develop automation for macro assembly and regression using Python, Tcl, Perl, SKILL.
  • Plan and support SRAM testchips and pre/post-silicon activities.
  • Lead pre-silicon verification, silicon bring-up and model-to-silicon correlation.
  • Create circuit specifications, reviews, and release documentation.
  • Mentor engineers on memory-circuit fundamentals and debugging.
  • Explore AI-assisted workflows for specification extraction and design automation.

Skills

SRAM design
Register-file design
Memory architecture
Cadence Virtuoso
SPICE simulators
PVT/Monte Carlo analyses
Python scripting
Clocking & timing

Education

BS/MS/PhD in Electrical Engineering

Tools

HSPICE
Spectre
FineSim

Job description

Micron Technology, Inc. in Boise, Idaho seeks an experienced SRAM Design Engineer to develop high-performance, low-power embedded memory IP and testchip content across advanced technologies.

You will lead architecture definition, transistor-level circuit design, layout interface, and pre-/post-silicon validation, collaborating with layout, CAD, process, test, and product teams to deliver production-ready memory solutions.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SRAM Design Lead – High-Performance Memory
SRAM Design Lead – High-Performance Memory

Micron Technology, Inc. • Boise (ID)

Hybrid
USD 153,000 - 267,000
SRAM Design Lead: Memory IP & PPA Expert
SRAM Design Lead: Memory IP & PPA Expert

Micron Technology, Inc. • Boise (ID)

On-site
USD 153,000 - 267,000
Medical, dental, and vision plans
Paid time off
Paid holidays
+1
SRAM Design Lead - Low-Power Memory Architect
SRAM Design Lead - Low-Power Memory Architect

Micron Technology, Inc. • City of Albany (NY)

On-site
USD 153,000 - 267,000
Medical, dental, and vision plans
Paid time off and holidays
Equity programs
Senior SRAM Design Lead – Low-Power Memory Architect
Senior SRAM Design Lead – Low-Power Memory Architect

Micron • Boise (ID)

On-site
USD 120,000 - 180,000
Senior DRAM Design Engineer, Memory Architect
Senior DRAM Design Engineer, Memory Architect

Micron Technology, Inc. • Boise (ID)

Hybrid
USD 130,000 - 210,000
SRAM Design Lead
SRAM Design Lead

Micron • Boise (ID)

On-site
USD 120,000 - 180,000
Senior DRAM Design Architect
Senior DRAM Design Architect

Micron • Boise (ID)

On-site
USD 110,000 - 160,000
Medical, dental and vision plans
Paid time off
Paid holidays
Senior DRAM RTL Design Engineer – High-Performance Memory
Senior DRAM RTL Design Engineer – High-Performance Memory

Micron Technology, Inc. • Boise (ID)

On-site
USD 120,000 - 180,000
Medical, dental, and vision plans
Paid time off & holidays
Benefits Guide
Staff DRAM Design Engineer — Memory Architect
Staff DRAM Design Engineer — Memory Architect

Micron Technology, Inc. • Boise (ID)

On-site
USD 120,000 - 170,000
Medical insurance
Dental insurance
Vision plans
+3
Staff DRAM Design Engineer — Lead Memory Circuits
Staff DRAM Design Engineer — Lead Memory Circuits

Micron Technology, Inc. • Boise (ID)

On-site
USD 120,000 - 180,000