Staff DRAM Design Engineer — Lead Memory Circuits

Micron Technology; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology in Boise, Idaho seeks a Staff Design Engineer for its DRAM team to own design decisions impacting cost, quality, reliability and time-to-market. You will work closely with design, verification, product and manufacturing, driving silicon-proximate ownership and collaborating across disciplines.

Responsibilities include designing Memory, Logic, and Analog circuits, parasitic modeling, and guiding layout and tape-out, with opportunity to leverage Generative AI tools while ensuring

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
• 5 years of CMOS and VLSI circuit design experience across digital and analog domains.
• Hands-on mixed-signal design, including schematic design, layout, and circuit simulation.
• Experience with power distribution design, parasitic modeling, and tape-out flows.

Responsibilities

• Design, lay out, and optimize Memory, Logic, and Analog circuits for new memory products.
• Handle parasitic modeling and support design validation, reticle experiments, and tape-out revisions.
• Oversee the layout process, including floor-planning, placement, and routing.
• Run verification through modeling and simulation using industry-standard simulators.
• Collaborate with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering, and use Generative AI tools to speed up design, analysis, and documentation while maintaining correctness and signoff.

Skills

CMOS/VLSI design

Mixed-signal design

Schematic design

Layout and tape-out

Power distribution

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Tools

Industry-standard EDA tools

Job description

Micron Technology in Boise, Idaho seeks a Staff Design Engineer for its DRAM team to own design decisions impacting cost, quality, reliability and time-to-market. You will work closely with design, verification, product and manufacturing, driving silicon-proximate ownership and collaborating across disciplines.

Responsibilities include designing Memory, Logic, and Analog circuits, parasitic modeling, and guiding layout and tape-out, with opportunity to leverage Generative AI tools while ensuring