Senior DRAM RTL Design Engineer – High-Performance Memory

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time off & holidays

Benefits Guide

Job summary

Micron Technology, Inc. in Boise, Idaho, seeks a Senior Digital Design Engineer to contribute to RTL design of DRAM digital and mixed‑signal blocks, collaborating with architecture, verification, and physical design teams to meet stringent PPA targets.

You will drive front‑end design, synthesis, timing analysis, and timing closure across the RTL‑to‑GDS flow, delivering high‑performance, power‑efficient designs for next‑generation memory products.

Qualifications

• Master’s degree in Electrical Engineering or equivalent with 4+ years of experience in digital ASIC/RTL design.
• Experience developing RTL for complex digital designs from specification through implementation handoff.
• Strong knowledge of ASIC front‑end design flows including RTL design, functional verification, logic synthesis, CDC/RDC analysis, and STA.

Responsibilities

• Design, develop, and deliver RTL for complex DRAM digital and mixed‑signal blocks, ensuring alignment with product specifications and performance targets.
• Perform front‑end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities.
• Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality.
• Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios.
• Improve design methodologies, automation, and RTL‑to‑GDS flows to enhance development efficiency, design quality, and time‑to‑market.

Skills

RTL Design

Verilog/SystemVerilog

Timing Analysis

Power Optimization

Synthesis

Front‑end Design Flows

Education

Master’s degree in Electrical Engineering

Bachelor’s degree in Electrical Engineering

Tools

Simulation Tools

Job description

Micron Technology, Inc. in Boise, Idaho, seeks a Senior Digital Design Engineer to contribute to RTL design of DRAM digital and mixed‑signal blocks, collaborating with architecture, verification, and physical design teams to meet stringent PPA targets.

You will drive front‑end design, synthesis, timing analysis, and timing closure across the RTL‑to‑GDS flow, delivering high‑performance, power‑efficient designs for next‑generation memory products.