Space-Grade ASIC DFT Engineer

United States Digital Space LLC

Austin (TX)

On-site

USD 90,000 - 130,000

Full time

14 days+

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Job summary

United States Digital Space LLC is seeking an ASIC/DFT Engineer to develop next-gen ASICs for space and ground infrastructure, including scanning and ATPG content. The role involves cross-disciplinary collaboration with systems, firmware, and design teams to ensure high-quality silicon and test coverage.

The candidate should have a background in ASIC design flow and be comfortable working in a dynamic environment with evolving requirements.

Qualifications

Bachelor’s degree in electrical engineering, computer engineering or computer science.
1+ years of professional experience working with ASICs.
Experience in scan insertion or DFT setup.
Familiar with Verilog/SystemVerilog, UPF, and DFT/DRC tools.
Ability to work in a dynamic, cross-disciplinary team.

Responsibilities

Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools.
Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems.
Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage.
Run ATPG(Automatic Test Pattern Generation) analysis to ensure quality scan chain construction and meeting basic coverage goals.
Run and debug non-timing and SDF annotated gate level simulations.
Creating ATPG content for use in post-silicon testing and validating that content through gate level simulation.
Collaborate with circuit physical design team, ATPG team and manufacturing team to facilitate high quality scan coverage in silicon.