Senior DFT Architect for Space ASICs

United States Digital Space LLC; Austin (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

United States Digital Space LLC is seeking a Principal DFT Engineer to lead the design and optimization of DFT architectures for space‑grade ASICs used in Starlink deployment. You will collaborate with cross‑disciplinary teams to develop test strategies, implement ATPG patterns, and ensure design readiness through RTL and hardware validation.

The role requires 10+ years in ASICs with DFT, scan insertion, and formal verification, plus experience with Verilog/SystemVerilog.

Qualifications

• Bachelor’s degree in electrical or computer engineering or computer science.
• 10+ years of experience with ASICs and DFT setup, integration and validation.
• Strong background in scan insertion, ATPG patterns, and pattern compression.

Responsibilities

• Lead implementation and optimization of DFT architectures using RTL and gate netlists.
• Own ATPG tools and pattern generation for stuck‑at, transition, and path delay faults.
• Evaluate design readiness for scan insertion via RTL and physical design DRC tools.
• Integrate and verify DFT fabrics and IP within Subsystems.
• Run non‑timing and SDF‑annotated simulations; debug issues.
• Develop test scripts and automate processes with Python, Perl, Tcl, or C+.

Skills

DFT architectures

ASIC design

RTL debugging

Verilog/SystemVerilog

Python/Perl scripting

Education

Bachelor's degree in Electrical/Computer Engineering or CS

Tools

Siemens Tessent

UPF

DRC/Scan tooling

Job description

United States Digital Space LLC is seeking a Principal DFT Engineer to lead the design and optimization of DFT architectures for space‑grade ASICs used in Starlink deployment. You will collaborate with cross‑disciplinary teams to develop test strategies, implement ATPG patterns, and ensure design readiness through RTL and hardware validation.

The role requires 10+ years in ASICs with DFT, scan insertion, and formal verification, plus experience with Verilog/SystemVerilog.