SoC Verification Engineer – FPGA/ASIC

TikTok; San Jose (CA); On-site; USD 162,000 - 317,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

401(k) with company match

Paid parental leave

Short-term and long-term disability

Job summary

TikTok is seeking a Video Codec Verification Engineer in San Jose to design and verify ASIC/SoC video codec hardware accelerators (FPGA/ASIC). You will create IP- or SoC-level testbenches using SystemVerilog and UVM, develop automated environments, and push coverage to 100% in a fast-growing, collaborative team.

Join a globally distributed company with robust benefits, including medical, dental, vision, 401(k) with match, parental leave, and generous time off, while working on scalable video

Qualifications

• Bachelor's degree or higher in Microelectronics, Computer Science, Electronic Communications, or a related field.
• 1+ years of working experience in ASIC/SoC verification.
• Mastery of SystemVerilog and UVM methodology, with the ability to independently build IP-level or SoC-level verification environments.
• Proficiency in mainstream simulation and debugging tools (VCS/Incisive/Questa, Verdi, etc.).
• Exceptional debugging and logical analysis skills; proficient in Python/Perl/Shell scripting for automation.

Responsibilities

• Verification Planning: Deeply analyze architecture and design specifications to develop comprehensive and high-coverage module-level, subsystem-level, or SoC system-level Test Plans.
• Environment Development: Build from scratch or maintain highly reusable and automated advanced verification environments (Testbench) and components (Scoreboard, Monitor, Sequence, etc.) based on UVM methodology.
• Test Execution & Closure: Develop high-quality testcases, execute Constrained Random and Directed tests, and drive Functional and Code Coverage to 100% closure.
• System-Level Verification: Responsible for Gate-Level Simulation (GLS) and SDF back-annotated timing simulation. Assist in FPGA prototyping and Hardware/Software co-debugging on Emulation platforms (e.g., Palladium/ZeBu).
• Flow Optimization: Develop and maintain regression testing scripts and automation tools to continuously improve the team's overall verification efficiency and compute resource utilization.

Skills

SystemVerilog/UVM expertise

Python/Perl/Shell scripting

Debugging and logical analysis

Education

Bachelor's degree or higher in Microelectronics, Computer Science, Electronic Communications

Tools

VCS/Incisive/Questa

Verdi

Palladium/ZeBu Emulation

Job description

TikTok is seeking a Video Codec Verification Engineer in San Jose to design and verify ASIC/SoC video codec hardware accelerators (FPGA/ASIC). You will create IP- or SoC-level testbenches using SystemVerilog and UVM, develop automated environments, and push coverage to 100% in a fast-growing, collaborative team.

Join a globally distributed company with robust benefits, including medical, dental, vision, 401(k) with match, parental leave, and generous time off, while working on scalable video