SoC RTL Design Engineer – Hybrid Work & Impact

Intel Corporation

Austin (TX)

Hybrid

USD 142,000 - 200,000

Full time

14 days+

Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

Intel Corporation in Austin, Texas is seeking a SoC Logic Design Engineer to develop RTL for SoC blocks, integrate IPs, and optimize blocks for power and performance. The role emphasizes secure hardware design practices and collaboration across IP teams in a hybrid work setting.

The ideal candidate has extensive Verilog RTL experience, SoC integration skills, and familiarity with AMBA protocols, NoC, and CDC techniques.

Qualifications

Bachelor's degree in Electrical or Computer Engineering with 4+ years in logic design and RTL.
Master's degree with 3+ years in RTL/SoC design and microarchitecture.
Experience with Verilog RTL coding and SoC integration.
Strong background in timing, power convergence, and physical implementation optimization.
Knowledge of Clock Domain Crossing techniques and Network-on-Chip architectures.
Experience with AMBA protocols (CHI, AXI, AHB, APB).

Responsibilities

Develop logic designs and RTL code for SoC blocks and subsystems.
Integrate IP blocks into full-chip SoC designs.
Participate in architecture/microarchitecture feature definition.
Optimize logic for power, performance, area, and timing.
Review verification plans and RTL test results; fix failing RTL tests.
Apply secure development practices in hardware design.
Collaborate with IP providers for IP integration and validation at the SoC level.
Ensure QA for IP/SoC handoff and design readiness.