SoC Logic Design Engineer

Intel Corporation; Austin (TX); Hybrid; USD 142,000 - 200,000; Full time

Job summary

Intel Corporation in Austin, Texas is seeking a SoC Logic Design Engineer to develop RTL for SoC blocks, integrate IPs, and optimize blocks for power and performance. The role emphasizes secure hardware design practices and collaboration across IP teams in a hybrid work setting.

The ideal candidate has extensive Verilog RTL experience, SoC integration skills, and familiarity with AMBA protocols, NoC, and CDC techniques.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering with 4+ years in logic design and RTL.
• Master's degree with 3+ years in RTL/SoC design and microarchitecture.
• Experience with Verilog RTL coding and SoC integration.
• Strong background in timing, power convergence, and physical implementation optimization.
• Knowledge of Clock Domain Crossing techniques and Network-on-Chip architectures.
• Experience with AMBA protocols (CHI, AXI, AHB, APB).

Responsibilities

• Develop logic designs and RTL code for SoC blocks and subsystems.
• Integrate IP blocks into full-chip SoC designs.
• Participate in architecture/microarchitecture feature definition.
• Optimize logic for power, performance, area, and timing.
• Review verification plans and RTL test results; fix failing RTL tests.
• Apply secure development practices in hardware design.
• Collaborate with IP providers for IP integration and validation at the SoC level.
• Ensure QA for IP/SoC handoff and design readiness.

Skills

Verilog RTL coding

SoC integration

Clocking & low-power design

Timing convergence

Physical implementation awareness

AMBA CHI/AXI/AHB/APB

Clock Domain Crossing (CDC)

NoC architectures

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Job description

Job Details:Job Description:The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs, coding at the register transfer level (RTL), and optimizing performance to deliver energy-efficient and secure solutions. Your contributions will directly impact Intel's ability to deliver innovative and market-leading semiconductor technologies.Business GroupThis position resides within Intel's leading-edge silicon engineering group, which is dedicated to designing, developing, and scaling advanced semiconductor solutions for a wide range of applications. This team focuses on integrating cutting-edge technology, ensuring quality standards, and driving innovation that supports Intel's commitment to delivering world-class products and solutions.Key ResponsibilitiesDevelop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specificationsIntegrate IP blocks and subsystems into comprehensive full-chip SoC designsParticipate in the definition of architecture and microarchitecture features of the blocks being designedOptimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategiesConduct quality checks to ensure design integrity and readiness for physical implementationReview verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL testsApply secure development practices to address security models and objectives in hardware designCollaborate with IP providers to integrate and validate IPs at the SoC levelEnsure quality assurance compliance for smooth IP/SoC handoff and design readinessProfessional Traits for SuccessTo thrive in this role, you should demonstrate the following:Collaborative Communicator — Proven ability to work across teams and convey complex technical ideas clearly and effectivelyInnovative Thinker — Enthusiasm for staying ahead of industry trends and applying creative approaches to SoC design challengesExecution-Driven — Demonstrated success in delivering complex projects from concept through implementationQualifications:Minimum QualificationsBachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of hands-on experience in logic design, RTL development, and microarchitecture implementation, or Master's degree with 3+ years of experience in the same fieldsThe years of experience must include:RTL coding languages such as VerilogExpertise in SoC integration, SoC clocking, and low-power design methodologiesExperience in strategies for timing, power convergence, and physical implementation optimizationHands-on experience with Clock Domain Crossing techniques and Network-on-Chip (NoC) architecturesWorking experience with AMBA protocols such as CHI, AXI, AHB, and APBPreferred QualificationsHands-on experience from spec to timing closure in at least one SoC/ASIC designWe encourage you to bring your expertise and passion for innovation to Intel, where your contributions will shape the future of semiconductor technology and empower industries worldwide.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location:US, Texas, AustinAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.