Hybrid RTL CPU Design Engineer

Intel Corporation; Austin, Northern (TX, KY); Hybrid; USD 91,000 - 173,000; Full time

Benefits offered by this job

Amazing Benefits

Health insurance

Dental insurance

Retirement benefits

14 paid holidays per year

3 weeks paid vacation

Stock purchase program

Job summary

Intel Corporation is seeking a RTL Design Engineer in Austin, TX to shape next-generation CPUs. You will develop RTL for CPU components, participate in defining architecture features, and optimize for power, performance, and area.

You will verify designs, fix RTL test issues, and document microarchitectural specifications to ensure seamless SoC integration. The role requires a Bachelor’s in Electrical/Computer Engineering and hands-on experience with Verilog/SystemVerilog or VHDL, plus scripting

Qualifications

• Bachelor’s degree required in Electrical or Computer Engineering or related STEM field.
• 3+ months of hands-on experience in CPU logic design, computer architecture, digital design/RTL coding, Verilog/SystemVerilog and/or VHDL, and scripting languages.

Responsibilities

• Develop RTL coding for CPU components (cell libraries, functional units, CPU IP blocks).
• Define architecture/microarchitecture features to optimize performance, power, and area.
• Meet power, performance, area, and timing goals while ensuring design integrity for physical implementation.
• Review and refine verification plans and tests for correct feature implementation.
• Resolve failing RTL tests and implement corrective actions.
• Document MAS for CPU features and ensure alignment with project goals.
• Support SoC customers to enable seamless CPU block integration.

Skills

CPU Logic Design

Computer Architecture

Digital design/RTL coding

Verilog SystemVerilog or VHDL

Scripting languages (Python Perl TCL)

Education

Bachelor’s Degree in Electrical or Computer Engineering

Job description

Intel Corporation is seeking a RTL Design Engineer in Austin, TX to shape next-generation CPUs. You will develop RTL for CPU components, participate in defining architecture features, and optimize for power, performance, and area.

You will verify designs, fix RTL test issues, and document microarchitectural specifications to ensure seamless SoC integration. The role requires a Bachelor’s in Electrical/Computer Engineering and hands-on experience with Verilog/SystemVerilog or VHDL, plus scripting