SoC RTL & Logic Design Engineer - Hybrid Role

Intel; Austin (TX); Hybrid; USD 141,910 - 200,340; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel is seeking a SoC Logic Design Engineer to advance the next generation of Intel's System on Chip designs. You will develop high-quality RTL, integrate IP blocks, and optimize for power, performance, and area while ensuring secure hardware design practices.

The role sits in a leading silicon engineering group with cross‑functional collaboration across teams. You will participate in architecture and microarchitecture feature definitions, drive verification readiness, and work with IP

Qualifications

• RTL coding languages such as Verilog
• Expertise in SoC integration, clocking, and low-power design methodologies
• Experience with timing, power convergence, and physical implementation optimization
• Hands-on experience with Clock Domain Crossing techniques and NoC architectures
• Familiarity with AMBA protocols CHI, AXI, AHB, and APB

Responsibilities

• Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specifications
• Integrate IP blocks and subsystems into comprehensive full-chip SoC designs
• Participate in the definition of architecture and microarchitecture features of the blocks being designed
• Optimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategies
• Conduct quality checks to ensure design integrity and readiness for physical implementation
• Review verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL tests
• Apply secure development practices to address security models and objectives in hardware design
• Collaborate with IP providers to integrate and validate IPs at the SoC level
• Ensure quality assurance compliance for smooth IP/SoC handoff and design readiness

Skills

RTL coding (Verilog)

SoC integration

Clock domain crossing

AMBA protocols (CHI/AXI/AHB/APB)

Education

Bachelor's in EE or CE

Master's in EE/CE preferred

Job description

Intel is seeking a SoC Logic Design Engineer to advance the next generation of Intel's System on Chip designs. You will develop high-quality RTL, integrate IP blocks, and optimize for power, performance, and area while ensuring secure hardware design practices.

The role sits in a leading silicon engineering group with cross‑functional collaboration across teams. You will participate in architecture and microarchitecture feature definitions, drive verification readiness, and work with IP