SoC Logic Design Engineer

Intel; Austin (TX); Hybrid; USD 141,910 - 200,340; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel is seeking a SoC Logic Design Engineer to advance the next generation of Intel's System on Chip designs. You will develop high-quality RTL, integrate IP blocks, and optimize for power, performance, and area while ensuring secure hardware design practices.

The role sits in a leading silicon engineering group with cross‑functional collaboration across teams. You will participate in architecture and microarchitecture feature definitions, drive verification readiness, and work with IP

Qualifications

• RTL coding languages such as Verilog
• Expertise in SoC integration, clocking, and low-power design methodologies
• Experience with timing, power convergence, and physical implementation optimization
• Hands-on experience with Clock Domain Crossing techniques and NoC architectures
• Familiarity with AMBA protocols CHI, AXI, AHB, and APB

Responsibilities

• Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specifications
• Integrate IP blocks and subsystems into comprehensive full-chip SoC designs
• Participate in the definition of architecture and microarchitecture features of the blocks being designed
• Optimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategies
• Conduct quality checks to ensure design integrity and readiness for physical implementation
• Review verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL tests
• Apply secure development practices to address security models and objectives in hardware design
• Collaborate with IP providers to integrate and validate IPs at the SoC level
• Ensure quality assurance compliance for smooth IP/SoC handoff and design readiness

Skills

RTL coding (Verilog)

SoC integration

Clock domain crossing

AMBA protocols (CHI/AXI/AHB/APB)

Education

Bachelor's in EE or CE

Master's in EE/CE preferred

Job description

Job Details

Job Description:

The Role and Impact

As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs, coding at the register transfer level (RTL), and optimizing performance to deliver energy-efficient and secure solutions. Your contributions will directly impact Intel's ability to deliver innovative and market-leading semiconductor technologies.

Business Group

This position resides within Intel's leading-edge silicon engineering group, which is dedicated to designing, developing, and scaling advanced semiconductor solutions for a wide range of applications. This team focuses on integrating cutting-edge technology, ensuring quality standards, and driving innovation that supports Intel's commitment to delivering world-class products and solutions.

Key Responsibilities

• Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specifications
• Integrate IP blocks and subsystems into comprehensive full-chip SoC designs
• Participate in the definition of architecture and microarchitecture features of the blocks being designed
• Optimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategies
• Conduct quality checks to ensure design integrity and readiness for physical implementation
• Review verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL tests
• Apply secure development practices to address security models and objectives in hardware design
• Collaborate with IP providers to integrate and validate IPs at the SoC level
• Ensure quality assurance compliance for smooth IP/SoC handoff and design readiness

Professional Traits for Success

• Collaborative Communicator — Proven ability to work across teams and convey complex technical ideas clearly and effectively
• Innovative Thinker — Enthusiasm for staying ahead of industry trends and applying creative approaches to SoC design challenges
• Execution-Driven — Demonstrated success in delivering complex projects from concept through implementation

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of hands‑on experience in logic design, RTL development, and microarchitecture implementation, or Master's degree with 3+ years of experience in the same fields
• The years of experience must include:
• RTL coding languages such as Verilog
• Expertise in SoC integration, SoC clocking, and low‑power design methodologies
• Experience in strategies for timing, power convergence, and physical implementation optimization
• Hands‑on experience with Clock Domain Crossing techniques and Network-on‑Chip (NoC) architectures
• Working experience with AMBA protocols such as CHI, AXI, AHB, and APB

Preferred Qualifications

• Hands‑on experience from spec to timing closure in at least one SoC/ASIC design

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, Texas, Austin

Additional Locations

US, California, Santa Clara, US, Oregon, Hillsboro

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US

$141,910.00 - 200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.