Hybrid RTL Design Engineer — CPU Logic & Architecture

Intel; Hillsboro (OR); Hybrid; USD 91,000 - 173,000; Full time

Benefits offered by this job

14 paid holidays

3 weeks paid vacation

4-week sabbatical every four years

Five bonuses per year

Employee stock purchase program

Job summary

Intel is seeking a CPU Logic Design Engineer to develop RTL for CPU components, define architecture features, and optimize power, performance, and area. You will write RTL, verify designs, and ensure readiness for physical implementation in a collaborative, fast-paced environment.

Responsibilities include MAS documentation, design verification refinement, and supporting SoC customers to integrate CPU blocks into larger designs. A strong team player with communication skills is essential.

Qualifications

• Bachelor’s Degree in Electrical or Computer Engineering or STEM field.
• 3+ months experience in CPU Logic Design, Computer Architecture/microprocessors, Digital design/RTL coding, Verilog/SystemVerilog/VHDL, scripting languages (Python, Perl, TCL).

Responsibilities

• Develop RTL coding for CPU components (cell libraries, functional units, CPU IP blocks).
• Define architecture/microarchitecture features to optimize CPU performance, power, area.
• Write RTL and meet power, performance, area, timing goals; prepare for physical implementation.
• Review and refine verification plans and tests for design features.
• Resolve failing RTL tests and implement corrective actions per specs.
• Document MAS for CPU features and align with project goals.
• Support SoC customers for seamless CPU block integration.

Skills

CPU Logic Design

Computer Architecture

Digital design/RTL coding

Verilog/SystemVerilog/VHDL

Scripting languages (Python, Perl, TCL

Education

Bachelor’s Degree in Electrical or Computer Engineering

Master's or PhD in Electrical/Computer Engineering

Job description

Intel is seeking a CPU Logic Design Engineer to develop RTL for CPU components, define architecture features, and optimize power, performance, and area. You will write RTL, verify designs, and ensure readiness for physical implementation in a collaborative, fast-paced environment.

Responsibilities include MAS documentation, design verification refinement, and supporting SoC customers to integrate CPU blocks into larger designs. A strong team player with communication skills is essential.