Senior CPU RTL Design & Architecture Engineer

Intel

Phoenix (AZ)

Hybrid

USD 142,000 - 269,000

Full time

41 hours ago
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Benefits offered by this job

Health benefits

Job summary

Intel’s CPU Design team is seeking a CPU Logic Design Engineer to design and optimize RTL for next‑generation processors. You will drive RTL code and simulations for CPU blocks and integrate into full‑chip designs, shaping architecture and microarchitecture features.

The role requires strong ownership of complex design deliverables, collaboration with architecture, design, verification, and SoC teams, and a focus on power, performance, and area to deliver high‑quality CPU solutions.

Qualifications

  • Bachelor's degree in electrical engineering, computer engineering, or computer science with 5+ years of relevant experience.
  • 5+ years experience in CPU RTL design using SystemVerilog.
  • 3+ years experience in energy-efficient and low-power design methods.
  • 3+ years experience in cross-clock domain crossings and power aware design.
  • 3+ years experience in scripting languages such as TCL, Perl, or Python.

Responsibilities

  • Develop and optimize RTL coding, and simulation for the CPU.
  • Participate in defining architecture and microarchitecture features of the CPU design.
  • Write RTL and optimize logic for power, performance, area, and timing goals.
  • Ensure design integrity for physical implementation through effective strategies, tools, and methods.
  • Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
  • Document microarchitectural specifications (MAS) for the CPU features.
  • Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.

Skills

RTL design
SystemVerilog
Power-aware design
Cross-clock domain crossings
Scripting (TCL/Perl/Python)

Education

Bachelor's degree in electrical/computer engineering or computer science
Master's degree (optional) in same field

Tools

n/a

Job description

Intel’s CPU Design team is seeking a CPU Logic Design Engineer to design and optimize RTL for next‑generation processors. You will drive RTL code and simulations for CPU blocks and integrate into full‑chip designs, shaping architecture and microarchitecture features.

The role requires strong ownership of complex design deliverables, collaboration with architecture, design, verification, and SoC teams, and a focus on power, performance, and area to deliver high‑quality CPU solutions.

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