Wellness benefits covering fitness and mental health
Job summary
A leading AI technology firm in San Jose is seeking a Design Verification Engineer. You will ensure the reliability of custom IPs, like DMA engines and NoCs, collaborating with architects and software developers. The ideal candidate has strong expertise in SystemVerilog and Python for performance verification. This role requires creative problem-solving skills and thorough understanding of digital design, as well as performance profiling experience. A competitive benefits package and relocation support are offered.
Qualifications
Strong understanding of digital design, RTL, and ASIC design flows.
Hands-on experience with performance verification, simulation, and modeling.
Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
Skilled in writing Python scripts for automation, data analysis, and performance modeling.
Experience building and maintaining performance models for chip subsystems.
Responsibilities
Verify the design's performance features alongside architects and RTL designers.
Identify performance bottlenecks and assist in tuning software.
Develop test plans and infrastructure for verification.
Create tests in SystemVerilog, Python, or other vectors.
Analyze coverage to ensure all performance features are validated.
Skills
Digital design understanding
RTL design
Performance verification
SystemVerilog expertise
Python scripting
Performance modeling
Performance bottleneck analysis
Job description
A leading AI technology firm in San Jose is seeking a Design Verification Engineer. You will ensure the reliability of custom IPs, like DMA engines and NoCs, collaborating with architects and software developers. The ideal candidate has strong expertise in SystemVerilog and Python for performance verification. This role requires creative problem-solving skills and thorough understanding of digital design, as well as performance profiling experience. A competitive benefits package and relocation support are offered.