Etched.ai, Inc. is seeking a Design Verification Engineer in San Jose. You will collaborate on verifying performance and correctness of custom IPs, including systolic arrays and DMA engines. The role requires strong digital design understanding and proficiency with SystemVerilog and Python for automation. Benefits include medical packages, housing subsidies, and daily meals. Join us in building pioneering AI hardware solutions and enjoy a collaborative, fully in-person work environment.
Qualifications
Strong understanding of digital design, RTL, and ASIC design flows.
Hands-on experience with performance verification, simulation, and modeling.
Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
Responsibilities
Verify performance features of the design closely with architects and RTL designers.
Develop test plans for performance tuning, correlation, and verification.
Debug performance issues and conduct performance tuning on silicon.
Skills
Digital design understanding
Performance verification experience
SystemVerilog development
Python scripting for automation
Performance model maintenance
Job description
Etched.ai, Inc. is seeking a Design Verification Engineer in San Jose. You will collaborate on verifying performance and correctness of custom IPs, including systolic arrays and DMA engines. The role requires strong digital design understanding and proficiency with SystemVerilog and Python for automation. Benefits include medical packages, housing subsidies, and daily meals. Join us in building pioneering AI hardware solutions and enjoy a collaborative, fully in-person work environment.