Performance Verification Engineer - Silicon-Ready Inference

The Consensus; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision packages

Daily lunch + dinner in office

Wellness benefits

Unlimited compute budget

Job summary

Etched is seeking a Design Verification Engineer to join the Systems/Performance Verification team, validating custom IPs powering our silicon. You will verify performance features, develop test infrastructure, and collaborate across RTL, software, and emulation groups to ensure silicon-ready designs.

You will build and maintain performance models, write SystemVerilog and Python tests, and drive end-to-end verification and tuning across the hardware-software stack.

Qualifications

• Strong understanding of digital design, RTL, and ASIC design flows.
• Hands-on performance verification, simulation, and modeling.
• Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
• Skilled in writing Python scripts for automation, data analysis, and performance modeling.
• Experience building and maintaining performance models for chip subsystems.

Responsibilities

• Verify performance features against models pre- and post-silicon.
• Collaborate with software and SW/FW/emulation teams to identify performance bottlenecks.
• Develop test plans and infrastructure/tools for performance tuning and verification.
• Improve and maintain architectural performance models.
• Develop SystemVerilog or Python-based tests and checkers to validate RTL and models.
• Develop coverage monitors and analyze coverage to ensure feature completeness.
• Debug performance issues and conduct silicon tuning.
• Drive end-to-end performance tuning across the ASIC design lifecycle.

Skills

SystemVerilog

RTL design

Performance verification

Python scripting

Testbench development

Debugging hardware

Tools

Simulation tools

Job description

Etched is seeking a Design Verification Engineer to join the Systems/Performance Verification team, validating custom IPs powering our silicon. You will verify performance features, develop test infrastructure, and collaborate across RTL, software, and emulation groups to ensure silicon-ready designs.

You will build and maintain performance models, write SystemVerilog and Python tests, and drive end-to-end verification and tuning across the hardware-software stack.